Efficient Silicon Multi-Chip System-in-Package Integration - Reliability, Failure Analysis and Test

Persistent URL: https://w3id.org/egdi/project/120227

Participants

Participant - Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek

Objective

The ENIAC JU project ESiP is addressing the issues of reliability, failure analysis and testing in innovative system-in-package (SiP) solutions. Highly integrated systems with greater miniaturisation and increased functionality open new markets and improve the quality of life through a wide range of applications. In particular, higher systems integration technologies using multi-chip packaging, through-silicon via technologies or package-stacking approaches are growing in importance. Market studies show that SiP devices will have an average growth of 10 to 20% per year over the next five years.

Start Date: 2010-05-01

End Date: 2013-04-01

Acronym: ESIP

Level: EU

Status: ONG

Total Cost: 36514419